Engineers use Logic Analyzers to acquire digital data from a system under test to aid the engineer to troubleshoot problems that may be occurring in the system under test. A logic analyzer is an invaluable tool to those engineers working on computer systems because of the ability of Logic Analyzers to acquire address, clock, and data information simultaneously over a very large number of input lines.
Unfortunately, a problem arises when a user wants use a logic analyzer to troubleshoot the operation of a memory stack in a system under test, as will be described below. Before describing the details of this problem, a brief review of memory stacks may be helpful.
A “stack” is a defined array of memory locations used for temporary data storage. Initially, the stack is “empty” (i.e., contains no data). A “stack pointer” is initially pointed, for example, to the bottommost memory location of the stack. Storing data to a stack is called “pushing the data onto the stack”, and reading data from a stack is called “popping data from the stack”. When data is pushed onto a stack, the data is stored in the memory location currently pointed-to by the stack pointer, and thereafter, the stack pointer is incremented to point to the next higher memory location. Thus, the stack “grows” from the bottom up. When data is popped from a stack, the stack pointer is decremented to point to the next lower memory location, and thereafter, the data is read from the memory location currently pointed-to by the stack pointer. Thus, the stack pointer always points to the available storage location at the top of the stack
For purposes of explanation, assume that upon detection of a certain event, information in the form of data gets “pushed” onto the stack, and that the detection of a different event causes information to be “popped” from the stack. If all goes well, the stack will grow and shrink within its defined bounds.
Unfortunately, due to an error condition, more information can be pushed onto a stack than it can hold, thus causing the stack to overflow and overwrite data in a higher adjacent memory array. Conversely, and also due to an error condition, more information can be popped from a stack than was pushed onto it, thus causing the stack to underflow and read from a lower adjacent memory array.
The above-mentioned problem is that current logic analyzers allow testing of only one of the two modes of incorrect stack operation. The reason for this inability to test both modes is as follows. Modern logic analyzers generally contain one or more counters that can be used to count incoming events. A trigger machine in such a logic analyzer allows the testing of these counters to determine if a predetermined count value has been reached. Unfortunately, the counters used in current logic analyzers count in one direction only. One might think that an up counter may be used to count events that lead to an overflow condition, and that a down counter may be used to count events leading to an underflow condition. Unfortunately, since the counters are not related to each other, such an attempt would produce meaningless counts in both counters. That is, the up counter has no knowledge of the number of number of times that the down counter has been decremented, and vice versa, thus neither counter would contain a count that reflects the true position of the stack pointer.